/*
 * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#pragma once

#define GPIO_EVT_CH0_RISE_EDGE                  1
#define GPIO_EVT_CH1_RISE_EDGE                  2
#define GPIO_EVT_CH2_RISE_EDGE                  3
#define GPIO_EVT_CH3_RISE_EDGE                  4
#define GPIO_EVT_CH4_RISE_EDGE                  5
#define GPIO_EVT_CH5_RISE_EDGE                  6
#define GPIO_EVT_CH6_RISE_EDGE                  7
#define GPIO_EVT_CH7_RISE_EDGE                  8
#define GPIO_EVT_CH0_FALL_EDGE                  9
#define GPIO_EVT_CH1_FALL_EDGE                  10
#define GPIO_EVT_CH2_FALL_EDGE                  11
#define GPIO_EVT_CH3_FALL_EDGE                  12
#define GPIO_EVT_CH4_FALL_EDGE                  13
#define GPIO_EVT_CH5_FALL_EDGE                  14
#define GPIO_EVT_CH6_FALL_EDGE                  15
#define GPIO_EVT_CH7_FALL_EDGE                  16
#define GPIO_EVT_CH0_ANY_EDGE                   17
#define GPIO_EVT_CH1_ANY_EDGE                   18
#define GPIO_EVT_CH2_ANY_EDGE                   19
#define GPIO_EVT_CH3_ANY_EDGE                   20
#define GPIO_EVT_CH4_ANY_EDGE                   21
#define GPIO_EVT_CH5_ANY_EDGE                   22
#define GPIO_EVT_CH6_ANY_EDGE                   23
#define GPIO_EVT_CH7_ANY_EDGE                   24
#define LEDC_EVT_DUTY_CHNG_END_CH0              27
#define LEDC_EVT_DUTY_CHNG_END_CH1              28
#define LEDC_EVT_DUTY_CHNG_END_CH2              29
#define LEDC_EVT_DUTY_CHNG_END_CH3              30
#define LEDC_EVT_DUTY_CHNG_END_CH4              31
#define LEDC_EVT_DUTY_CHNG_END_CH5              32
#define LEDC_EVT_DUTY_CHNG_END_CH6              33
#define LEDC_EVT_DUTY_CHNG_END_CH7              34
#define LEDC_EVT_OVF_CNT_PLS_CH0                35
#define LEDC_EVT_OVF_CNT_PLS_CH1                36
#define LEDC_EVT_OVF_CNT_PLS_CH2                37
#define LEDC_EVT_OVF_CNT_PLS_CH3                38
#define LEDC_EVT_OVF_CNT_PLS_CH4                39
#define LEDC_EVT_OVF_CNT_PLS_CH5                40
#define LEDC_EVT_OVF_CNT_PLS_CH6                41
#define LEDC_EVT_OVF_CNT_PLS_CH7                42
#define LEDC_EVT_TIME_OVF_TIMER0                43
#define LEDC_EVT_TIME_OVF_TIMER1                44
#define LEDC_EVT_TIME_OVF_TIMER2                45
#define LEDC_EVT_TIME_OVF_TIMER3                46
#define LEDC_EVT_TIMER0_CMP                     47
#define LEDC_EVT_TIMER1_CMP                     48
#define LEDC_EVT_TIMER2_CMP                     49
#define LEDC_EVT_TIMER3_CMP                     50
#define TG0_EVT_CNT_CMP_TIMER0                  51
#define TG1_EVT_CNT_CMP_TIMER0                  52
#define SYSTIMER_EVT_CNT_CMP0                   53
#define SYSTIMER_EVT_CNT_CMP1                   54
#define SYSTIMER_EVT_CNT_CMP2                   55
#define MCPWM0_EVT_TIMER0_STOP                  56
#define MCPWM0_EVT_TIMER1_STOP                  57
#define MCPWM0_EVT_TIMER2_STOP                  58
#define MCPWM0_EVT_TIMER0_TEZ                   59
#define MCPWM0_EVT_TIMER1_TEZ                   60
#define MCPWM0_EVT_TIMER2_TEZ                   61
#define MCPWM0_EVT_TIMER0_TEP                   62
#define MCPWM0_EVT_TIMER1_TEP                   63
#define MCPWM0_EVT_TIMER2_TEP                   64
#define MCPWM0_EVT_OP0_TEA                      65
#define MCPWM0_EVT_OP1_TEA                      66
#define MCPWM0_EVT_OP2_TEA                      67
#define MCPWM0_EVT_OP0_TEB                      68
#define MCPWM0_EVT_OP1_TEB                      69
#define MCPWM0_EVT_OP2_TEB                      70
#define MCPWM0_EVT_F0                           71
#define MCPWM0_EVT_F1                           72
#define MCPWM0_EVT_F2                           73
#define MCPWM0_EVT_F0_CLR                       74
#define MCPWM0_EVT_F1_CLR                       75
#define MCPWM0_EVT_F2_CLR                       76
#define MCPWM0_EVT_TZ0_CBC                      77
#define MCPWM0_EVT_TZ1_CBC                      78
#define MCPWM0_EVT_TZ2_CBC                      79
#define MCPWM0_EVT_TZ0_OST                      80
#define MCPWM0_EVT_TZ1_OST                      81
#define MCPWM0_EVT_TZ2_OST                      82
#define MCPWM0_EVT_CAP0                         83
#define MCPWM0_EVT_CAP1                         84
#define MCPWM0_EVT_CAP2                         85
#define MCPWM0_EVT_OP0_TEE1                     86
#define MCPWM0_EVT_OP1_TEE1                     87
#define MCPWM0_EVT_OP2_TEE1                     88
#define MCPWM0_EVT_OP0_TEE2                     89
#define MCPWM0_EVT_OP1_TEE2                     90
#define MCPWM0_EVT_OP2_TEE2                     91
#define MCPWM1_EVT_TIMER0_STOP                  92
#define MCPWM1_EVT_TIMER1_STOP                  93
#define MCPWM1_EVT_TIMER2_STOP                  94
#define MCPWM1_EVT_TIMER0_TEZ                   95
#define MCPWM1_EVT_TIMER1_TEZ                   96
#define MCPWM1_EVT_TIMER2_TEZ                   97
#define MCPWM1_EVT_TIMER0_TEP                   98
#define MCPWM1_EVT_TIMER1_TEP                   99
#define MCPWM1_EVT_TIMER2_TEP                   100
#define MCPWM1_EVT_OP0_TEA                      101
#define MCPWM1_EVT_OP1_TEA                      102
#define MCPWM1_EVT_OP2_TEA                      103
#define MCPWM1_EVT_OP0_TEB                      104
#define MCPWM1_EVT_OP1_TEB                      105
#define MCPWM1_EVT_OP2_TEB                      106
#define MCPWM1_EVT_F0                           107
#define MCPWM1_EVT_F1                           108
#define MCPWM1_EVT_F2                           109
#define MCPWM1_EVT_F0_CLR                       110
#define MCPWM1_EVT_F1_CLR                       111
#define MCPWM1_EVT_F2_CLR                       112
#define MCPWM1_EVT_TZ0_CBC                      113
#define MCPWM1_EVT_TZ1_CBC                      114
#define MCPWM1_EVT_TZ2_CBC                      115
#define MCPWM1_EVT_TZ0_OST                      116
#define MCPWM1_EVT_TZ1_OST                      117
#define MCPWM1_EVT_TZ2_OST                      118
#define MCPWM1_EVT_CAP0                         119
#define MCPWM1_EVT_CAP1                         120
#define MCPWM1_EVT_CAP2                         121
#define MCPWM1_EVT_OP0_TEE1                     122
#define MCPWM1_EVT_OP1_TEE1                     123
#define MCPWM1_EVT_OP2_TEE1                     124
#define MCPWM1_EVT_OP0_TEE2                     125
#define MCPWM1_EVT_OP1_TEE2                     126
#define MCPWM1_EVT_OP2_TEE2                     127
#define ADC_EVT_CONV_CMPLT0                     128
#define ADC_EVT_EQ_ABOVE_THRESH0                129
#define ADC_EVT_EQ_ABOVE_THRESH1                130
#define ADC_EVT_EQ_BELOW_THRESH0                131
#define ADC_EVT_EQ_BELOW_THRESH1                132
#define ADC_EVT_RESULT_DONE0                    133
#define ADC_EVT_STOPPED0                        134
#define ADC_EVT_STARTED0                        135
#define REGDMA_EVT_DONE0                        136
#define REGDMA_EVT_DONE1                        137
#define REGDMA_EVT_DONE2                        138
#define REGDMA_EVT_DONE3                        139
#define REGDMA_EVT_ERR0                         140
#define REGDMA_EVT_ERR1                         141
#define REGDMA_EVT_ERR2                         142
#define REGDMA_EVT_ERR3                         143
#define TMPSNSR_EVT_OVER_LIMIT                  144
#define I2S0_EVT_RX_DONE                        145
#define I2S0_EVT_TX_DONE                        146
#define I2S0_EVT_X_WORDS_RECEIVED               147
#define I2S0_EVT_X_WORDS_SENT                   148
#define RTC_EVT_TICK                            152
#define RTC_EVT_OVF                             153
#define RTC_EVT_CMP                             154
#define GDMA_EVT_IN_DONE_CH0                    155
#define GDMA_EVT_IN_DONE_CH1                    156
#define GDMA_EVT_IN_DONE_CH2                    157
#define GDMA_EVT_IN_DONE_CH3                    158
#define GDMA_EVT_IN_DONE_CH4                    159
#define GDMA_EVT_IN_SUC_EOF_CH0                 160
#define GDMA_EVT_IN_SUC_EOF_CH1                 161
#define GDMA_EVT_IN_SUC_EOF_CH2                 162
#define GDMA_EVT_IN_SUC_EOF_CH3                 163
#define GDMA_EVT_IN_SUC_EOF_CH4                 164
#define GDMA_EVT_IN_FIFO_EMPTY_CH0              165
#define GDMA_EVT_IN_FIFO_EMPTY_CH1              166
#define GDMA_EVT_IN_FIFO_EMPTY_CH2              167
#define GDMA_EVT_IN_FIFO_EMPTY_CH3              168
#define GDMA_EVT_IN_FIFO_EMPTY_CH4              169
#define GDMA_EVT_IN_FIFO_FULL_CH0               170
#define GDMA_EVT_IN_FIFO_FULL_CH1               171
#define GDMA_EVT_IN_FIFO_FULL_CH2               172
#define GDMA_EVT_IN_FIFO_FULL_CH3               173
#define GDMA_EVT_IN_FIFO_FULL_CH4               174
#define GDMA_EVT_OUT_DONE_CH0                   175
#define GDMA_EVT_OUT_DONE_CH1                   176
#define GDMA_EVT_OUT_DONE_CH2                   177
#define GDMA_EVT_OUT_DONE_CH3                   178
#define GDMA_EVT_OUT_DONE_CH4                   179
#define GDMA_EVT_OUT_EOF_CH0                    180
#define GDMA_EVT_OUT_EOF_CH1                    181
#define GDMA_EVT_OUT_EOF_CH2                    182
#define GDMA_EVT_OUT_EOF_CH3                    183
#define GDMA_EVT_OUT_EOF_CH4                    184
#define GDMA_EVT_OUT_TOTAL_EOF_CH0              185
#define GDMA_EVT_OUT_TOTAL_EOF_CH1              186
#define GDMA_EVT_OUT_TOTAL_EOF_CH2              187
#define GDMA_EVT_OUT_TOTAL_EOF_CH3              188
#define GDMA_EVT_OUT_TOTAL_EOF_CH4              189
#define GDMA_EVT_OUT_FIFO_EMPTY_CH0             190
#define GDMA_EVT_OUT_FIFO_EMPTY_CH1             191
#define GDMA_EVT_OUT_FIFO_EMPTY_CH2             192
#define GDMA_EVT_OUT_FIFO_EMPTY_CH3             193
#define GDMA_EVT_OUT_FIFO_EMPTY_CH4             194
#define GDMA_EVT_OUT_FIFO_FULL_CH0              195
#define GDMA_EVT_OUT_FIFO_FULL_CH1              196
#define GDMA_EVT_OUT_FIFO_FULL_CH2              197
#define GDMA_EVT_OUT_FIFO_FULL_CH3              198
#define GDMA_EVT_OUT_FIFO_FULL_CH4              199
#define PMU_EVT_SLEEP_WEEKUP                    200
#define MODEM_EVT_G0                            201
#define MODEM_EVT_G1                            202
#define MODEM_EVT_G2                            203
#define MODEM_EVT_G3                            204
#define ZERO_DET_EVT_CHANNEL_1_POS              205
#define ZERO_DET_EVT_CHANNEL_2_POS              206
#define ZERO_DET_EVT_CHANNEL_3_POS              207
#define ZERO_DET_EVT_CHANNEL_1_NEG              208
#define ZERO_DET_EVT_CHANNEL_2_NEG              209
#define ZERO_DET_EVT_CHANNEL_3_NEG              210
#define GPIO_TASK_CH0_SET                       1
#define GPIO_TASK_CH1_SET                       2
#define GPIO_TASK_CH2_SET                       3
#define GPIO_TASK_CH3_SET                       4
#define GPIO_TASK_CH4_SET                       5
#define GPIO_TASK_CH5_SET                       6
#define GPIO_TASK_CH6_SET                       7
#define GPIO_TASK_CH7_SET                       8
#define GPIO_TASK_CH0_CLEAR                     9
#define GPIO_TASK_CH1_CLEAR                     10
#define GPIO_TASK_CH2_CLEAR                     11
#define GPIO_TASK_CH3_CLEAR                     12
#define GPIO_TASK_CH4_CLEAR                     13
#define GPIO_TASK_CH5_CLEAR                     14
#define GPIO_TASK_CH6_CLEAR                     15
#define GPIO_TASK_CH7_CLEAR                     16
#define GPIO_TASK_CH0_TOGGLE                    17
#define GPIO_TASK_CH1_TOGGLE                    18
#define GPIO_TASK_CH2_TOGGLE                    19
#define GPIO_TASK_CH3_TOGGLE                    20
#define GPIO_TASK_CH4_TOGGLE                    21
#define GPIO_TASK_CH5_TOGGLE                    22
#define GPIO_TASK_CH6_TOGGLE                    23
#define GPIO_TASK_CH7_TOGGLE                    24
#define LEDC_TASK_TIMER0_RES_UPDATE             25
#define LEDC_TASK_TIMER1_RES_UPDATE             26
#define LEDC_TASK_TIMER2_RES_UPDATE             27
#define LEDC_TASK_TIMER3_RES_UPDATE             28
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH0         29
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH1         30
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH2         31
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH3         32
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH4         33
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH5         34
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH6         35
#define LEDC_TASK_DUTY_SCALE_UPDATE_CH7         36
#define LEDC_TASK_TIMER0_CAP                    37
#define LEDC_TASK_TIMER1_CAP                    38
#define LEDC_TASK_TIMER2_CAP                    39
#define LEDC_TASK_TIMER3_CAP                    40
#define LEDC_TASK_SIG_OUT_DIS_CH0               41
#define LEDC_TASK_SIG_OUT_DIS_CH1               42
#define LEDC_TASK_SIG_OUT_DIS_CH2               43
#define LEDC_TASK_SIG_OUT_DIS_CH3               44
#define LEDC_TASK_SIG_OUT_DIS_CH4               45
#define LEDC_TASK_SIG_OUT_DIS_CH5               46
#define LEDC_TASK_SIG_OUT_DIS_CH6               47
#define LEDC_TASK_SIG_OUT_DIS_CH7               48
#define LEDC_TASK_OVF_CNT_RST_CH0               49
#define LEDC_TASK_OVF_CNT_RST_CH1               50
#define LEDC_TASK_OVF_CNT_RST_CH2               51
#define LEDC_TASK_OVF_CNT_RST_CH3               52
#define LEDC_TASK_OVF_CNT_RST_CH4               53
#define LEDC_TASK_OVF_CNT_RST_CH5               54
#define LEDC_TASK_OVF_CNT_RST_CH6               55
#define LEDC_TASK_OVF_CNT_RST_CH7               56
#define LEDC_TASK_TIMER0_RST                    57
#define LEDC_TASK_TIMER1_RST                    58
#define LEDC_TASK_TIMER2_RST                    59
#define LEDC_TASK_TIMER3_RST                    60
#define LEDC_TASK_TIMER0_RESUME                 61
#define LEDC_TASK_TIMER1_RESUME                 62
#define LEDC_TASK_TIMER2_RESUME                 63
#define LEDC_TASK_TIMER3_RESUME                 64
#define LEDC_TASK_TIMER0_PAUSE                  65
#define LEDC_TASK_TIMER1_PAUSE                  66
#define LEDC_TASK_TIMER2_PAUSE                  67
#define LEDC_TASK_TIMER3_PAUSE                  68
#define LEDC_TASK_FADE_RESTART_CH0              69
#define LEDC_TASK_FADE_RESTART_CH1              70
#define LEDC_TASK_FADE_RESTART_CH2              71
#define LEDC_TASK_FADE_RESTART_CH3              72
#define LEDC_TASK_FADE_RESTART_CH4              73
#define LEDC_TASK_FADE_RESTART_CH5              74
#define LEDC_TASK_FADE_RESTART_CH6              75
#define LEDC_TASK_FADE_RESTART_CH7              76
#define LEDC_TASK_FADE_PAUSE_CH0                77
#define LEDC_TASK_FADE_PAUSE_CH1                78
#define LEDC_TASK_FADE_PAUSE_CH2                79
#define LEDC_TASK_FADE_PAUSE_CH3                80
#define LEDC_TASK_FADE_PAUSE_CH4                81
#define LEDC_TASK_FADE_PAUSE_CH5                82
#define LEDC_TASK_FADE_PAUSE_CH6                83
#define LEDC_TASK_FADE_PAUSE_CH7                84
#define LEDC_TASK_FADE_RESUME_CH0               85
#define LEDC_TASK_FADE_RESUME_CH1               86
#define LEDC_TASK_FADE_RESUME_CH2               87
#define LEDC_TASK_FADE_RESUME_CH3               88
#define LEDC_TASK_FADE_RESUME_CH4               89
#define LEDC_TASK_FADE_RESUME_CH5               90
#define LEDC_TASK_FADE_RESUME_CH6               91
#define LEDC_TASK_FADE_RESUME_CH7               92
#define TG0_TASK_CNT_START_TIMER0               93
#define TG0_TASK_ALARM_START_TIMER0             94
#define TG0_TASK_CNT_STOP_TIMER0                95
#define TG0_TASK_CNT_RELOAD_TIMER0              96
#define TG0_TASK_CNT_CAP_TIMER0                 97
#define TG1_TASK_CNT_START_TIMER0               98
#define TG1_TASK_ALARM_START_TIMER0             99
#define TG1_TASK_CNT_STOP_TIMER0                100
#define TG1_TASK_CNT_RELOAD_TIMER0              101
#define TG1_TASK_CNT_CAP_TIMER0                 102
#define MCPWM0_TASK_CMPR0_A_UP                  103
#define MCPWM0_TASK_CMPR1_A_UP                  104
#define MCPWM0_TASK_CMPR2_A_UP                  105
#define MCPWM0_TASK_CMPR0_B_UP                  106
#define MCPWM0_TASK_CMPR1_B_UP                  107
#define MCPWM0_TASK_CMPR2_B_UP                  108
#define MCPWM0_TASK_GEN_STOP                    109
#define MCPWM0_TASK_TIMER0_SYN                  110
#define MCPWM0_TASK_TIMER1_SYN                  111
#define MCPWM0_TASK_TIMER2_SYN                  112
#define MCPWM0_TASK_TIMER0_PERIOD_UP            113
#define MCPWM0_TASK_TIMER1_PERIOD_UP            114
#define MCPWM0_TASK_TIMER2_PERIOD_UP            115
#define MCPWM0_TASK_TZ0_OST                     116
#define MCPWM0_TASK_TZ1_OST                     117
#define MCPWM0_TASK_TZ2_OST                     118
#define MCPWM0_TASK_CLR0_OST                    119
#define MCPWM0_TASK_CLR1_OST                    120
#define MCPWM0_TASK_CLR2_OST                    121
#define MCPWM0_TASK_CAP0                        122
#define MCPWM0_TASK_CAP1                        123
#define MCPWM0_TASK_CAP2                        124
#define MCPWM1_TASK_CMPR0_A_UP                  125
#define MCPWM1_TASK_CMPR1_A_UP                  126
#define MCPWM1_TASK_CMPR2_A_UP                  127
#define MCPWM1_TASK_CMPR0_B_UP                  128
#define MCPWM1_TASK_CMPR1_B_UP                  129
#define MCPWM1_TASK_CMPR2_B_UP                  130
#define MCPWM1_TASK_GEN_STOP                    131
#define MCPWM1_TASK_TIMER0_SYN                  132
#define MCPWM1_TASK_TIMER1_SYN                  133
#define MCPWM1_TASK_TIMER2_SYN                  134
#define MCPWM1_TASK_TIMER0_PERIOD_UP            135
#define MCPWM1_TASK_TIMER1_PERIOD_UP            136
#define MCPWM1_TASK_TIMER2_PERIOD_UP            137
#define MCPWM1_TASK_TZ0_OST                     138
#define MCPWM1_TASK_TZ1_OST                     139
#define MCPWM1_TASK_TZ2_OST                     140
#define MCPWM1_TASK_CLR0_OST                    141
#define MCPWM1_TASK_CLR1_OST                    142
#define MCPWM1_TASK_CLR2_OST                    143
#define MCPWM1_TASK_CAP0                        144
#define MCPWM1_TASK_CAP1                        145
#define MCPWM1_TASK_CAP2                        146
#define ADC_TASK_SAMPLE0                        147
#define ADC_TASK_SAMPLE1                        148
#define ADC_TASK_START0                         149
#define ADC_TASK_STOP0                          150
#define REGDMA_TASK_START0                      151
#define REGDMA_TASK_START1                      152
#define REGDMA_TASK_START2                      153
#define REGDMA_TASK_START3                      154
#define TMPSNSR_TASK_START_SAMPLE               155
#define TMPSNSR_TASK_STOP_SAMPLE                156
#define I2S0_TASK_START_RX                      157
#define I2S0_TASK_START_TX                      158
#define I2S0_TASK_STOP_RX                       159
#define I2S0_TASK_STOP_TX                       160
#define I2S0_TASK_SYNC_CHECK                    161
#define GDMA_TASK_IN_START_CH0                  168
#define GDMA_TASK_IN_START_CH1                  169
#define GDMA_TASK_IN_START_CH2                  170
#define GDMA_TASK_IN_START_CH3                  171
#define GDMA_TASK_IN_START_CH4                  172
#define GDMA_TASK_OUT_START_CH0                 173
#define GDMA_TASK_OUT_START_CH1                 174
#define GDMA_TASK_OUT_START_CH2                 175
#define GDMA_TASK_OUT_START_CH3                 176
#define GDMA_TASK_OUT_START_CH4                 177
#define PMU_TASK_SLEEP_REQ                      178
#define MODEM_TASK_G0                           179
#define MODEM_TASK_G1                           180
#define MODEM_TASK_G2                           181
#define MODEM_TASK_G3                           182
#define ZERO_DET_TASK_START                     183
